首页>
外国专利>
Semiconductor transistors having high-K gate dielectric layers, metal gate electrode regions, and low fringing capacitances
Semiconductor transistors having high-K gate dielectric layers, metal gate electrode regions, and low fringing capacitances
展开▼
机译:具有高K栅极介电层,金属栅电极区域和低边缘电容的半导体晶体管
展开▼
页面导航
摘要
著录项
相似文献
摘要
A semiconductor structure and a method for forming the same. The structure includes (i) a semiconductor substrate which includes a channel region, (ii) first and second source/drain regions on the semiconductor substrate, (iii) a gate dielectric region, and (iv) a gate electrode region, (v) a plurality of interconnect layers on the gate electrode region, and (vi) first and second spaces. The gate dielectric region is disposed between and in direct physical contact with the channel region and the gate electrode region. The gate electrode region is disposed between and in direct physical contact with the gate dielectric region and the interconnect layers. The first and second spaces are in direct physical contact with the gate electrode region. The first space is disposed between the first source/drain region and the gate electrode region. The second space is disposed between the second source/drain region and the gate electrode region.
展开▼