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A CAPACITOR-LESS ONE TRANSISTOR SEMICONDUCTOR MEMORY DEVICE HAVING IMPROVED DATA RETENTION ABILITIES AND OPERATION CHARACTERISTICS
A CAPACITOR-LESS ONE TRANSISTOR SEMICONDUCTOR MEMORY DEVICE HAVING IMPROVED DATA RETENTION ABILITIES AND OPERATION CHARACTERISTICS
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机译:具有改进的数据保持能力和工作特性的无电容单晶体管半导体存储器
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摘要
PURPOSE: A capacitor-less 1T semiconductor memory device is provided to improve data sensing margin by enhancing data retention and storage performance. CONSTITUTION: A bottom insulation layer(130) is formed on a substrate(110). An active region is formed on the bottom insulation layer and includes a source region(140), a drain region(160), and a floating body(150) between the source region and the drain region. A gate pattern is formed on the floating body. The floating body includes a main floating body and a first upper floating body. The main floating body has the same height as one of the source region and the drain region. The gate pattern includes a gate insulation layer(180) and a gate electrode(170) formed on the first upper floating body.
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