首页> 外国专利> METHOD FOR MANUFACTURING A POSITIVE-CHANNEL MOS TRANSISTOR AND A METHOD FOR FORMING THE DUAL GATE OF A SEMICONDUCTOR DEVICE USING THE SAME, CAPABLE OF EFFECTIVELY DOPING A POLY-SILICON LAYER ON A GATE INSULATION LAYER

METHOD FOR MANUFACTURING A POSITIVE-CHANNEL MOS TRANSISTOR AND A METHOD FOR FORMING THE DUAL GATE OF A SEMICONDUCTOR DEVICE USING THE SAME, CAPABLE OF EFFECTIVELY DOPING A POLY-SILICON LAYER ON A GATE INSULATION LAYER

机译:制造正沟道型MOS晶体管的方法和使用相同形状形成半导体器件的双栅极的方法,能够有效地在栅极绝缘层上掺杂多晶硅层

摘要

PURPOSE: A method for manufacturing a positive-channel MOS(PMOS) transistor and a method for forming the dual gate of a semiconductor device using the same are provided to prevent the formation of an oxide layer between a poly-silicon layer and a metal electrode layer.;CONSTITUTION: A gate insulation layer(510) is formed on a semiconductor substrate(500). A poly-silicon layer(520) is formed on the gate insulation layer. The poly-silicon layer is doped in an atomic layer deposition chamber or a chemical vapor deposition chamber with a boron-contained gas. The temperature in the chamber is between 50 and 450°C. A photo resist pattern(530) is formed on the poly-silicon layer.;COPYRIGHT KIPO 2010
机译:目的:提供一种用于制造正沟道MOS(PMOS)晶体管的方法以及使用该晶体管来形成半导体器件的双栅极的方法,以防止在多晶硅层和金属电极之间形成氧化层。组成:栅极绝缘层(510)形成在半导体衬底(500)上。在栅极绝缘层上形成多晶硅层(520)。多晶硅层在原子层沉积室或化学气相沉积室中掺杂有含硼气体。腔室中的温度在50至450℃之间。在多晶硅层上形成光致抗蚀剂图案(530)。;COPYRIGHT KIPO 2010

著录项

  • 公开/公告号KR20100052741A

    专利类型

  • 公开/公告日2010-05-20

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20080111581

  • 申请日2008-11-11

  • 分类号H01L21/336;H01L21/265;H01L29/78;

  • 国家 KR

  • 入库时间 2022-08-21 18:32:43

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