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SEMICONDUCTOR PACKAGE, CAPABLE OF PREVENTING DAMAGE TO SEMICONDUCTOR CHIPS UNDER A RELIABILITY TEST AND A HIGH TEMPERATURE ENVIRONMENT
SEMICONDUCTOR PACKAGE, CAPABLE OF PREVENTING DAMAGE TO SEMICONDUCTOR CHIPS UNDER A RELIABILITY TEST AND A HIGH TEMPERATURE ENVIRONMENT
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机译:半导体封装,能够在可靠性测试和高温环境下防止损坏半导体芯片
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摘要
PURPOSE: A semiconductor package is provided to prevent the deterioration of laminated semiconductor chips by preventing the formation of the space between the laminated semiconductor chips.;CONSTITUTION: A semiconductor chip(10) has a penetration hole. The penetrating electrode(20) passes through the penetration hole of the semiconductor chip. A first end of the penetrating electrode is projected from the surface of the semiconductor chip. A second end of the penetrating electrode is projected from the bottom surface of the semiconductor chip. A first gap-fill member(30) exposes the first end of the penetrating electrode. A connection member(40) is projected from the first gap-fill member. The second gap-fill member(50) has the recess portion.;COPYRIGHT KIPO 2011
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