A method for multi-level - reading out a phase change memory cell as well as the phase change memory

摘要

According to a method for multi level - reading of a change in phase - memory cell, first a bit line (9) and a pws - cell (2) is selected, and a first bias voltage (v_Bl, V₀₀) at the selected bit line (9) is applied. A first read current (i_Rd00), the by the selected bit line (9) in response to said first bias voltage (v_Bl, V₀₀) flows, with a first reference current (i₀₀) compared. The first reference current (i₀₀) is such that the first read current (i_Rd00) is smaller than the first reference current (i₀₀), if the selected pws - cell (2) in a reset - state, and otherwise greater. It is then determined whether the selected pws - cell (2) in the reset - state, on the basis of the comparing the first sense current (i_Rd00) with the first reference current (i₀₀). A second bias voltage (v_Bl, V₀₁), the greater than the first bias voltage (v_Bl, V₀₀) on the selected bit line (9) applied, if the selected pws - cell (2) is not in the reset - state.