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SEMICONDUCTOR INTEGRATED CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT DESIGN METHOD, SCANNING TEST PATTERN GENERATION METHOD, AND ITS PROGRAM
SEMICONDUCTOR INTEGRATED CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT DESIGN METHOD, SCANNING TEST PATTERN GENERATION METHOD, AND ITS PROGRAM
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机译:半导体集成电路,半导体集成电路设计方法,扫描测试图案生成方法及其程序
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摘要
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit, a semiconductor integrated circuit design method, a scanning test pattern generation method, and a program capable of reducing cost in a scanning test.;SOLUTION: The semiconductor integrated circuit 1 includes a controlling scanning test component circuit which a test value is scanned therein and outputs the test value to a combination circuit 203 and an observing scanning test component circuit which the test value scanned in the controlling scanning test component circuit is scanned therein in parallel and an output value output by the combination circuit 203 based on a test value from the controlling scanning test component circuit is input thereto to scan out the output value.;COPYRIGHT: (C)2011,JPO&INPIT
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