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SEMICONDUCTOR PACKAGE AND A METHOD FOR MANUFACTURING THE SAME, CAPABLE OF ELIMINATING INTERNAL VOIDS GENERATED IN A MOLDING PROCESS

机译:半导体封装及其制造方法,能够消除成型过程中产生的内部空隙

摘要

PURPOSE: A semiconductor package and a method for manufacturing the same are provided to reduce a time required for implementing processes by attaching a lead with a gate hole to the upper side of a semiconductor die before a molding process.;CONSTITUTION: A circuit board(110) includes an insulating layer(110a), wiring patterns(111, 112), and a conductive via(113). A semiconductor die(120) is formed on the upper side of the circuit board. A conductive bump(130) is formed on the lower side of the semiconductor die. A lead(140) is in contact with the circuit board and the upper side of the semiconductor die. A molding process is implemented with respect to the circuit board and the lead using encapsulant(150).;COPYRIGHT KIPO 2011
机译:用途:一种半导体封装及其制造方法,旨在通过在模制工艺之前将带有栅孔的引线附着到半导体管芯的上侧来减少实施工艺所需的时间;组成:电路板( 110)包括绝缘层(110a),布线图案(111、112)和导电通孔(113)。半导体管芯(120)形成在电路板的上侧。导电凸块(130)形成在半导体管芯的下侧上。引线(140)与电路板和半导体管芯的上侧接触。使用密封剂(150)对电路板和引线执行成型工艺。; COPYRIGHT KIPO 2011

著录项

  • 公开/公告号KR20100132232A

    专利类型

  • 公开/公告日2010-12-17

    原文格式PDF

  • 申请/专利权人 AMKOR TECHNOLOGY KOREA INC.;

    申请/专利号KR20090050945

  • 发明设计人 LEE SEO WON;KIM KEUN SOO;KIM JAE YUN;

    申请日2009-06-09

  • 分类号H01L23/28;H01L23/48;

  • 国家 KR

  • 入库时间 2022-08-21 17:53:06

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