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SEMICONDUCTOR PACKAGE AND A METHOD FOR MANUFACTURING THE SAME, CAPABLE OF ELIMINATING INTERNAL VOIDS GENERATED IN A MOLDING PROCESS
SEMICONDUCTOR PACKAGE AND A METHOD FOR MANUFACTURING THE SAME, CAPABLE OF ELIMINATING INTERNAL VOIDS GENERATED IN A MOLDING PROCESS
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机译:半导体封装及其制造方法,能够消除成型过程中产生的内部空隙
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摘要
PURPOSE: A semiconductor package and a method for manufacturing the same are provided to reduce a time required for implementing processes by attaching a lead with a gate hole to the upper side of a semiconductor die before a molding process.;CONSTITUTION: A circuit board(110) includes an insulating layer(110a), wiring patterns(111, 112), and a conductive via(113). A semiconductor die(120) is formed on the upper side of the circuit board. A conductive bump(130) is formed on the lower side of the semiconductor die. A lead(140) is in contact with the circuit board and the upper side of the semiconductor die. A molding process is implemented with respect to the circuit board and the lead using encapsulant(150).;COPYRIGHT KIPO 2011
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