首页> 外国专利> SEMICONDUCTOR SUBSTRATE INCLUDING A VERTICAL CELL AND MANUFACTURING METHOD THEREOF CAPABLE OF FORMING A SMALL DEIGN DEVICE BY REMOVING A CELL CONTACT

SEMICONDUCTOR SUBSTRATE INCLUDING A VERTICAL CELL AND MANUFACTURING METHOD THEREOF CAPABLE OF FORMING A SMALL DEIGN DEVICE BY REMOVING A CELL CONTACT

机译:包括垂直单元的半导体衬底及其制造方法,该方法能够通过去除单元接触而形成小尺寸的器件

摘要

PURPOSE: A semiconductor substrate including a vertical cell and a manufacturing method thereof are provided to stably form a first active area and a second active area by dividing the first active area and the second active area after a device isolation layer is formed. ;CONSTITUTION: An active area is defined by forming a device isolation layer(24B) on a substrate(21). A first trench(26A) is formed to divide the active area into a first active area(25A) and a second active area(25B). A buried bit line(28) fills a part of the first trench. A gap fill layer fills the upper side of the buried bit line. A second trench is formed by etching the gap fill layer and the device isolation layer cross the buried bit line.;COPYRIGHT KIPO 2011
机译:目的:提供一种包括垂直单元的半导体基板及其制造方法,以在形成器件隔离层之后通过划分第一有源区和第二有源区来稳定地形成第一有源区和第二有源区。 ;组成:通过在衬底(21)上形成器件隔离层(24B)来定义有源区。形成第一沟槽(26A)以将有源区域划分为第一有源区域(25A)和第二有源区域(25B)。掩埋位线(28)填充了第一沟槽的一部分。间隙填充层填充掩埋位线的上侧。通过刻蚀间隙填充层和器件隔离层穿过掩埋位线形成第二沟槽。; COPYRIGHT KIPO 2011

著录项

  • 公开/公告号KR20110078021A

    专利类型

  • 公开/公告日2011-07-07

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20090134732

  • 发明设计人 PARK JUNG WOO;

    申请日2009-12-30

  • 分类号H01L21/8242;H01L27/108;

  • 国家 KR

  • 入库时间 2022-08-21 17:51:31

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