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The method of forming the transistor and recess gate thin film transistor, with a low impurity concentration drain of self-aligned

机译:具有自对准的低杂质浓度漏极的形成晶体管和凹栅薄膜晶体管的方法

摘要

PROBLEM TO BE SOLVED: To provide a recessed-gate thin film transistor (RG-TFT) with a self-aligned lightly doped drain (LDD), and a corresponding forming method.;SOLUTION: A method related to the present invention comprises: a step of depositing an insulator covering a substrate; a step of etching a trench, which has a bottom and sidewalls, in the insulator; a step of forming an active silicon (Si) layer covering the insulator and the trench, and of forming a gate oxide layer covering the active Si layer; and a step of forming a recessed gate electrode in the trench. The TFT is doped, and LDD regions covering the trench sidewalls are formed in the active Si layer. Each LDD region has a length that extends from the top of the trench sidewall to the trench bottom, and a doping concentration of the LDD region which decreases according to the LDD length. In other words, the LDD length is directly related to the depth of the trench.;COPYRIGHT: (C)2008,JPO&INPIT
机译:解决的问题:提供一种具有自对准轻掺杂漏极(LDD)的凹栅薄膜晶体管(RG-TFT)及其相应的形成方法。解决方案:与本发明有关的方法包括:沉积覆盖衬底的绝缘体的步骤;在绝缘体中蚀刻具有底部和侧壁的沟槽的步骤;形成覆盖绝缘体和沟槽的有源硅(Si)层,以及形成覆盖有源Si层的栅氧化层的步骤;在沟槽中形成凹陷的栅电极的步骤。掺杂TFT,并且在有源Si层中形成覆盖沟槽侧壁的LDD区域。每个LDD区域具有从沟槽侧壁的顶部延伸到沟槽底部的长度,并且LDD区域的掺杂浓度根据LDD长度而减小。换句话说,LDD的长度与沟槽的深度直接相关。版权所有:(C)2008,JPO&INPIT

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