Impact of SiN_x capping on the formation of source/drain contact for In-Ga-Zn-O thin film transistor with self-aligned gate

摘要

Self-aligned gate structures are preferred for faster operation and scaling down of thin film transistors by reducing the overlapped region between source/drain and gate electrodes. Doping on source/drain regions is essential to fabricate such a self-aligned gate thin film transistor. For oxide semiconductors such as In-Ga-Zn-O, SiN_x capping readily increases their carrier concentration. We report that the SiN_x deposition temperature and thickness significantly affect the device properties, including threshold voltage, field effect mobility, and contact resistance. The reason for these variations in device characteristics mainly comes from the extension of the doped region to the gated area after the SiN_x capping step. Analyses on capacitance-voltage and transfer length characteristics support this idea.