Gate-planarized and aluminum-gate fully self-aligned amorphous silicon thin-film transistors for large-area and high-resolution active matrix liquid crystal displays (AMLCDs).

摘要

Active Matrix Liquid Crystal Display is a well-known term for TFT-LCD (Thin Film Transistor-LCD) since the notebook-sized mobile computers started to be popular on the market. As the demand for large-area flat panel displays with high performance grows, even larger flat panel displays for EWS compatible resolution are under development by many display companies. Criteria for these high performance units include high resolution, high contrast ratio, full-color, large-area, and fast video rate. The key solutions for these high performance AMLCDs are summarized into two terms: low RC transmission delay and high performance smaller switching devices.; In this study, several approaches have been investigated and realized. First, technology for pure aluminum gate a-Si:H TFT was developed with a US display company, OIS, Inc. The high performance Al-gate a-Si:H TFT was fabricated based on the newly developed aluminum anodic oxidation technique, and it was one of the first high performance, pure Al-gate a-Si:H TFTs among leading groups. The resistance component of RC transmission delay was largely reduced.; Second, the gate planarization technology was developed with Dow Coming, Inc. Gate electrode was planarized with spin-coated polymer, 'Flowable Oxide' (FOxRTM). The technology for this silicon based polymer, (HSiO3/2)n was successfully developed, and gate planarized a-Si:H TFT was fabricated. The gate planarization technology broadened the selection of gate metallurgy since high resistivity metal could be stacked and planarized without having the step coverage issues during the process.; Finally, the smaller and faster switching device was realized with a fully self-aligned technology incorporating back-substrate exposure. A new structure and process for fully self-aligned a-Si:H TFTs were proposed. We were able to reduce the overlap between gate electrode and source/drain electrode to less than one micron, since this technology does not allow any unintended misalignment. This fully self-aligned TFT tailored the parasitic capacitance from the display circuitry. In addition, the small size made higher resolution available.