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COL package having small chip hidden between leads

机译:COL封装,引线之间隐藏着小芯片

摘要

A Chip-On-Lead (COL) type semiconductor package having small chip hidden between leads is revealed. The lower surfaces of the leadframe's leads are attached to a wiring substrate and the leads are horizontally bent to form a die-holding cavity. A smaller chip is disposed on the wiring substrate by passing through the die-holding cavity to be on the same disposing level with the leads. At least a larger chip is disposed on the leads to overlap the smaller chip so that the small chip does not extrude from the leads. The encapsulant encapsulates a plurality of internal parts of the leads, the wiring substrate, and the larger chip. Therefore, the conventional unbalance issue of mold flow above and below the leads leading to cause excessive warpage can be avoided and numbers of stacked larger chips can be increased to have larger memory capacities.
机译:揭示了一种在引线之间隐藏有小芯片的引线芯片(COL)型半导体封装。引线框的引线的下表面连接到布线基板,并且引线被水平弯曲以形成管芯保持腔。通过穿过管芯保持腔将较小的芯片布置在布线基板上,以与引线处于相同的布置水平。至少一个较大的芯片布置在引线上以与较小的芯片重叠,从而使较小的芯片不从引线伸出。密封剂密封引线,布线基板和较大芯片的多个内部部分。因此,可以避免导致引线过度翘曲的引线上方和下方传统的铸模流动不平衡问题,并且可以增加堆叠的较大芯片的数量以具有更大的存储容量。

著录项

  • 公开/公告号US8125063B2

    专利类型

  • 公开/公告日2012-02-28

    原文格式PDF

  • 申请/专利权人 CHIN-FA WANG;

    申请/专利号US20100719490

  • 发明设计人 CHIN-FA WANG;

    申请日2010-03-08

  • 分类号H01L23/495;H01L23/48;

  • 国家 US

  • 入库时间 2022-08-21 17:26:46

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