首页> 外国专利> INTEGRATED CIRCUIT WITH FACE-TO-FACE BONDED PASSIVE VARIABLE RESISTANCE MEMORY AND METHOD FOR MAKING THE SAME

INTEGRATED CIRCUIT WITH FACE-TO-FACE BONDED PASSIVE VARIABLE RESISTANCE MEMORY AND METHOD FOR MAKING THE SAME

机译:具有面对面结合的无源可变电阻存储器的集成电路及其制造方法

摘要

In one example, an integrated circuit includes two integrated circuit dies that are face-to-face mounted together. The first integrated circuit die includes passive variable resistance memory and the second integrated circuit die includes memory control logic (e.g., CMOS logic circuit). The passive variable resistance memory, also known as resistive non-volatile memory, may be for example memristors, phase-change memory, or magnetoresistive memory. Each memory cell of the passive variable resistance memory on the first integrated circuit die is electrically connected to the memory control logic on the second integrated circuit die through at least one vertical interconnect accesses (vias). For example, the operation (e.g., write/read) of each passive variable resistance memory cell is controlled by the memory control logic. The integrated circuit may also include processor logic on the second integrated circuit die operatively coupled to the memory control logic.
机译:在一个示例中,集成电路包括两个面对面安装在一起的集成电路管芯。第一集成电路管芯包括无源可变电阻存储器,第二集成电路管芯包括存储器控制逻辑(例如,CMOS逻辑电路)。无源可变电阻存储器,也称为电阻非易失性存储器,可以是例如忆阻器,相变存储器或磁阻存储器。第一集成电路管芯上的无源可变电阻存储器的每个存储单元通过至少一个垂直互连访问(通孔)电连接到第二集成电路管芯上的存储器控​​制逻辑。例如,每个无源可变电阻存储单元的操作(例如,写入/读取)由存储控制逻辑来控制。集成电路还可包括在第二集成电路管芯上的处理器逻辑,该处理器逻辑可操作地耦合至存储器控制逻辑。

著录项

  • 公开/公告号US2013051116A1

    专利类型

  • 公开/公告日2013-02-28

    原文格式PDF

  • 申请/专利权人 WILLIAM G. EN;DON R. WEISS;

    申请/专利号US201113216604

  • 发明设计人 DON R. WEISS;WILLIAM G. EN;

    申请日2011-08-24

  • 分类号G11C11/56;H01L45/00;H01L21/50;H01L21/62;

  • 国家 US

  • 入库时间 2022-08-21 16:48:10

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