PHASE-LOCKED LOOP CAPABLE OF MINIMIZING JITTERS GENERATED FROM THE PHASE-LOCKED LOOP, AND CLOCK GENERATION SYSTEM CONTAINING THE SAME

摘要

PURPOSE: A phase-locked loop and a clock generation system containing the same are provided to perform operations based on jitter free oscillation signals generated by VCXO(Voltage Controlled Crystal Oscillator) output in a phase-locked loop, by including an auxiliary phase-locked loop.;CONSTITUTION: A phase detector(100) detects phase differences between reference clock signals and output clock signals, and generates phase detection signals. A charge pump(200) supplies pumping current based on the phase detection signals. A loop filter(300) supplies filtered pumping voltage corresponding to the pumping current. A voltage controlled crystal oscillator(400) generates crystal oscillation signals based on the filtered pumping voltage. An auxiliary phase-locked loop(500) locks the phase of the output clock signals based on the crystal oscillation signals.;COPYRIGHT KIPO 2013;[Reference numerals] (100) Phase detector; (200) Charge pump; (300) Loop filter; (500) Auxiliary PLL