SEMICONDUCTOR MEMORY DEVICE INCLUDING A COMPLEMENTARY BIT LINE IN A SENSE AMPLIFIER

摘要

PURPOSE: A semiconductor memory device is provided to improve the integration of the semiconductor memory device and to reduce an area occupied by a sense amplifier.;CONSTITUTION: A memory cell array is arranged in a first layer of a first region and includes a memory cell(MC) in an intersection of a word line(WL) and a cell bit line(BLC). A sense amplifier(SA) is arranged in a second layer and is connected to a bit line connected to the cell bit line and a complementary bit line corresponding to the bit line. The sense amplifier senses data stored in the memory cell. An output device is arranged in the first layer and is electrically connected to the cell bit line. A local interconnect via(LV) is arranged in the first region and connects the cell bit line to the bit line.;COPYRIGHT KIPO 2013