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DECODING METHOD, DECODING CIRCUIT, MEMORY STORAGE DEVICE AND CONTROLLING CIRCUIT UNIT
DECODING METHOD, DECODING CIRCUIT, MEMORY STORAGE DEVICE AND CONTROLLING CIRCUIT UNIT
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机译:解码方法,解码电路,存储装置和控制电路单元
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摘要
A decoding method, a memory storage device, a memory controlling circuit unit and a decoding circuit for low density parity code (LDPC) are provided. The decoding method includes: reading a data bit of each memory cell; performing a parity check procedure on the data bits to generate a plurality of checks; in an iterative decoding of LDPC, obtaining a reliability message of each data bit according to the checks and deciding an index of an error bit from the data bits according to the reliability messages; determining whether the index of the error bit and the checks comply with a parity criteria; and if the index of the error bit and the checks comply with the parity criteria, stopping the iterative decoding and outputting the index of the error bit. Accordingly, a decoding latency is decreased.
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