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Slot-Shielded Coplanar Strip-line Compatible with CMOS Processes

机译:与CMOS工艺兼容的槽屏蔽共面带状线

摘要

A strip-line includes a ground plane extending through a plurality of dielectric layers over a substrate; a signal line over the substrate and on a side of the ground plane; a first plurality of metal strips under the signal line and in a first metal layer, wherein the first plurality of metal strips is parallel to each other, and is spaced apart from each other by spaces; and a second plurality of metal strips under the signal line and in a second metal layer over the first metal layer. The second plurality of metal strips vertically overlaps the spaces. The first plurality of metal strips is electrically coupled to the second plurality of metal strips through the ground plane, and no via physically contacts the first plurality of metal strips and the second plurality of metal strips.
机译:带状线包括接地平面,该接地平面延伸穿过基板上方的多个介电层。基板上方和接地平面一侧的信号线;在信号线下方和第一金属层中的第一多个金属带,其中,第一多个金属带彼此平行,并且彼此间隔开空间;第二多个金属条位于信号线下方,且位于第一金属层上方的第二金属层中。第二多个金属条在垂直方向上与空间重叠。所述第一多个金属条通过所述接地平面电耦合到所述第二多个金属条,并且没有通孔物理接触所述第一多个金属条和所述第二多个金属条。

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