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Method for controlling warpage within electronic products and an electronic product

机译:电子产品内翘曲的控制方法及电子产品

摘要

The present invention discloses a method for minimizing warpage in the electronic products, and the structures of such electronic products as well. Groove holes are formed into the insulating material layer or several layers. The groove holes can be processed by laser drilling or by other suitable means. A cured epoxy adhesive will fill the groove holes after the heat and pressure treatment performed to the circuit structure. The electronic product may contain several insulating layers and embedded electronic components connected to a wiring layer. A double-stacked symmetrical structure can also be manufactured. Asymmetrical structures with different sized embedded components can be handled as well. The groove holes can be shaped as straight short lines, ellipses, crosses, circles etc, or as any combination of different shapes. The groove holes can be scratched so that they locate outside strips, between the strips of a panel, between blocks of the strip, between modules of the block or between embedded components of the module.
机译:本发明公开了一种用于使电子产品中的翘曲最小化的方法,以及这种电子产品的结构。在绝缘材料层或多层中形成凹槽孔。凹槽孔可以通过激光钻孔或通过其他合适的方式进行处理。在对电路结构进行热处理和压力处理之后,固化的环氧粘合剂将填充凹槽孔。电子产品可以包含几个绝缘层和连接到布线层的嵌入式电子组件。也可以制造双层堆叠的对称结构。具有不同大小的嵌入式组件的不对称结构也可以处理。凹槽孔的形状可以是短直线,椭圆,十字,圆形等,也可以是不同形状的任意组合。可以刮擦凹槽孔,以使它们位于面板的条之间,条的块之间,块的模块之间或模块的嵌入式组件之间的外部条上。

著录项

  • 公开/公告号US9420694B2

    专利类型

  • 公开/公告日2016-08-16

    原文格式PDF

  • 申请/专利权人 KWAN SIK CHUNG;

    申请/专利号US20100872538

  • 发明设计人 KWAN SIK CHUNG;

    申请日2010-08-31

  • 分类号H05K3/36;H05K1/18;H01L23/498;H01L23/538;H05K3/46;

  • 国家 US

  • 入库时间 2022-08-21 14:31:47

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