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Apparatus to reduce retention failure in complementary resistive memory
Apparatus to reduce retention failure in complementary resistive memory
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机译:用于减少互补电阻式存储器中的保持失败的设备
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摘要
Described is an apparatus which comprises: a complementary resistive memory bit-cell; and a sense amplifier coupled to the complementary resistive memory bit-cell, wherein the sense amplifier includes: a first output node; and a first transistor which is operable to cause a deterministic output on the first output node.
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