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3D LATCH-UP SUPPRESSION AND SUBSTRATE NOISE COUPLING REDUCTION THROUGH A SUBSTRATE BACK-TIE FOR 3D INTEGRATED CIRCUITS
3D LATCH-UP SUPPRESSION AND SUBSTRATE NOISE COUPLING REDUCTION THROUGH A SUBSTRATE BACK-TIE FOR 3D INTEGRATED CIRCUITS
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机译:通过3D集成电路的基板背带实现3D闩锁抑制和基板噪声耦合降低
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摘要
When an overview of integrated circuit devices, the one end portion to the upper surface completely through the substrate, the substrate and the other end has a conductor extending in the rear substrate. In various embodiments, the conductors are isolated from all of the conductors and the device features on the chip adjacent to the bottom of any of the RDL all conductors and / or the 3D integrated circuit structure is isolated from the substrate rear surface side. There is also described the manufacturing method.
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