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DETECTING CIRCUIT DESIGN FLAWS BASED ON TIMING ANALYSIS
DETECTING CIRCUIT DESIGN FLAWS BASED ON TIMING ANALYSIS
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机译:基于时序分析的电路设计缺陷检测
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摘要
An end point report for a design of an electronic circuit may be analyzed. Results of a static timing analysis run are loaded, a path from the loaded results is selected, and technology specific context data is provided. Additionally, a determination is made for every test point of the selected path of design quality parameters for determining a design problem area, and a determination is made for every design problem area, of a root cause by analyzing design problem area data in comparison to related ones of the technology specific context data.
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