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Infinite-depth path-based analysis of operational timing for circuit design

机译:基于无限深度路径的电路设计工作时序分析

摘要

A static timing analysis system for finding timing violations in a digital circuit design prior to circuit fabrication, and associated methods, use infinite-depth path-based analysis (IPBA) to achieve reduced pessimism as opposed to systems or methods employing only graph-based analysis (GBA), but with greatly reduced compute time requirements, or greater logic path coverage, versus systems or methods employing conventional or exhaustive path-based analysis. IPBA achieves the improved coverage or compute time results by slotting nodes of a circuit design graph into stages, propagating phases stage-by-stage for all paths in parallel, and merging phases wherever possible during the analysis.
机译:与仅采用基于图形的分析的系统或方法相比,用于在电路制造之前查找数字电路设计中的时序违规的静态时序分析系统及其相关方法使用无限深度基于路径的分析(IPBA)来实现降低的悲观性(GBA),但与采用常规或详尽的基于路径的分析的系统或方法相比,极大地减少了计算时间要求或更大的逻辑路径覆盖范围。 IPBA通过将电路设计图的节点划分为多个阶段,针对所有并行路径逐步扩展阶段,以及在分析过程中尽可能合并阶段,从而实现了改善的覆盖范围或计算时间结果。

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