首页> 外国专利> DESIGN SUPPORTING APPARATUS OF SEMICONDUCTOR INTEGRATED CIRCUIT, COUNTERMEASURE METHOD OF ELECTROMAGNETIC INTERFERENCE OF SEMICONDUCTOR INTEGRATED CIRCUIT, AND RECORDING MEDIUM

DESIGN SUPPORTING APPARATUS OF SEMICONDUCTOR INTEGRATED CIRCUIT, COUNTERMEASURE METHOD OF ELECTROMAGNETIC INTERFERENCE OF SEMICONDUCTOR INTEGRATED CIRCUIT, AND RECORDING MEDIUM

机译:半导体集成电路的设计支持装置,半导体集成电路的电磁干扰对策以及记录介质

摘要

A design supporting apparatus of a semiconductor integrated circuit includes an input device configured to receive data of a transient current waveform, a first modeling part configured to model the semiconductor integrated circuit as a current source for generating the transient current waveform and to connect the current source and an equivalent circuit of an evaluation board to generate an evaluation circuit model, a first calculation part configured to calculate electromagnetic interference of the evaluation circuit model, a first correction part configured to correct a portion of the equivalent circuit of the evaluation board, a second modeling part configured to add an additional circuit to a corrected evaluation circuit model to generate a countermeasure circuit model, a second calculation part configured to calculate electromagnetic interference of the countermeasure circuit model, and a second correction part configured to correct the additional circuit.
机译:半导体集成电路的设计支持设备包括:输入装置,被配置为接收瞬态电流波形的数据;第一建模部分,被配置为将半导体集成电路建模为用于生成瞬态电流波形的电流源,并且连接电流源评估板的等效电路,用于生成评估电路模型;第一计算部分,用于计算评估电路模型的电磁干扰;第一校正部分,用于对评估板的等效电路的一部分进行校正;第二部分,用于校正评估板的等效电路。建模部分,其被配置为将附加电路添加到校正后的评估电路模型以生成对策电路模型;第二计算部分,其被配置为计算对策电路模型的电磁干扰;以及第二校正部分,其被配置为对附加电路进行校正。

著录项

  • 公开/公告号US2017091373A1

    专利类型

  • 公开/公告日2017-03-30

    原文格式PDF

  • 申请/专利权人 ROHM CO. LTD.;

    申请/专利号US201615272824

  • 发明设计人 RYOSUKE INAGAKI;

    申请日2016-09-22

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 13:47:11

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