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Methods of dividing layouts and methods of manufacturing semiconductor devices using the same
Methods of dividing layouts and methods of manufacturing semiconductor devices using the same
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机译:布局的划分方法以及使用该划分方法的半导体装置的制造方法
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摘要
Target pattern layouts that include lower and upper target patterns are designed. Each lower target pattern is combined with a upper target pattern that at least partially overlaps a top surface thereof to form combination structures. The combination structures are divided into first and second combination structures. A first target pattern is formed from the lower target pattern in the first combination structure and a third target pattern is formed from the upper target pattern in the first combination structure. The first and third target patterns are formed in first and third lithography processes, respectively. A second target pattern is formed from the lower target pattern in the second combination structure and a fourth target pattern is formed from the upper target pattern in the second combination structure. The second and fourth target patterns are formed in second and fourth lithography processes, respectively.
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