COVERAGE ENHANCEMENT AND POWER AWARE CLOCK SYSTEM FOR STRUCTURAL DELAY-FAULT TEST

摘要

A method and apparatus are provided for applying to a clock system of a scan circuit to increase test coverage for structural delay fault testing. According to one aspect, a method of applying to a clock system of a scan circuit of a scan test comprising one or more clock gating cells includes the steps of outputting a clock signal of a controllable waveform in each clock gating cell at any stage of the scan test, And removing the partially enabled clock signal during a capture cycle in each clock gating cell.