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Memory device, server device, and memory control method

机译:存储器设备,服务器设备和存储器控制方法

摘要

A memory device has a plurality of memory units, an error correction processor, and a memory controller. The memory units include semiconductor memories, and read and write in parallel. The error correction processor converts input content data into recording data which includes the content data and an error correction code. The error correction processor decodes the content data by performing conversion including error correction of recording data read out of the memory units. The memory controller writes recording data divided into a number of data into an area of areas extending over the memory units. The memory controller reads the divided recording data from the area. The memory controller determines that writing into the area has been completed normally if the number of the semiconductor memories of which abnormality has been detected is less than or equal to a number of abnormalities correctable by the error correction processor.
机译:存储设备具有多个存储单元,纠错处理器和存储控制器。存储单元包括半导体存储器,并且以并行方式进行读取和写入。纠错处理器将输入的内容数据转换为包括内容数据和纠错码的记录数据。纠错处理器通过执行包括对从存储单元读出的记录数据的纠错的转换来对内容数据进行解码。存储器控制器将被划分为多个数据的记录数据写入在存储器单元上延伸的区域的区域中。存储控制器从该区域读取分割的记录数据。如果已检测到异常的半导体存储器的数量小于或等于可由纠错处理器校正的异常的数量,则存储器控制器确定对区域的写入已正常完成。

著录项

  • 公开/公告号US9952924B2

    专利类型

  • 公开/公告日2018-04-24

    原文格式PDF

  • 申请/专利权人 KABUSHIKI KAISHA TOSHIBA;

    申请/专利号US201414916767

  • 发明设计人 YUICHIRO HANAFUSA;

    申请日2014-04-18

  • 分类号G06F12/16;G06F11/10;G06F3/06;G11C29/52;

  • 国家 US

  • 入库时间 2022-08-21 12:57:51

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