On-chip test circuit for magnetic random access memory (MRAM)

摘要

Embodiments include a test circuit to test one or more magnetic tunnel junctions (MTJs) of a magnetic random access memory (MRAM). The test circuit may measure a 1/f noise of the MTJ in the time domain, and determine a power spectral density (PSD) of the 1/f noise. The test circuit may estimate one or more parameters of the MTJ and/or MRAM based on the PSD. For example, the test circuit may determine a noise parameter, such as a Hooge alpha parameter, based on the PSD, and may estimate the one or more parameters of the MTJ and/or MRAM based on the 1/f parameter. Other embodiments may be described and claimed.