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FINFET including source and drain regions with dopant diffusion blocking superlattice layers to reduce contact resistance
FINFET including source and drain regions with dopant diffusion blocking superlattice layers to reduce contact resistance
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机译:FINFET包括具有掺杂扩散阻止超晶格层以减少接触电阻的源极和漏极区域
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摘要
A FINFET may include a semiconductor fin, spaced apart source and drain regions in the semiconductor fin with a channel region extending therebetween, and at least one dopant diffusion blocking superlattice dividing at least one of the source and drain regions into a lower region and an upper region with the upper region having a same conductivity and higher dopant concentration than the lower region. The dopant diffusion blocking superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may further include a gate on the channel region.
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