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FINFET INCLUDING SOURCE AND DRAIN REGIONS WITH DOPANT DIFFUSION BLOCKING SUPERLATTICE LAYERS TO REDUCE CONTACT RESISTANCE AND ASSOCIATED METHODS
FINFET INCLUDING SOURCE AND DRAIN REGIONS WITH DOPANT DIFFUSION BLOCKING SUPERLATTICE LAYERS TO REDUCE CONTACT RESISTANCE AND ASSOCIATED METHODS
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机译:FinFET包括带有掺杂剂扩散的源极和漏极区,阻塞超晶格层,以降低接触电阻和相关方法
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摘要
A FINFET may include a semiconductor fin, spaced apart source and drain regions in the semiconductor fin with a channel region extending therebetween, and at least one dopant diffusion blocking superlattice dividing at least one of the source and drain regions into a lower region and an upper region with the upper region having a same conductivity and higher dopant concentration than the lower region. The dopant diffusion blocking superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The FINFET may further include a gate on the channel region.
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