Dual channel CMOS with common gate stack

摘要

A method and resulting structure for a dual channel complementary metal oxide semiconductor (CMOS) having a common gate stack. A first semiconductor fin is formed on a substrate. A second semiconductor fin is formed on the substrate adjacent to the first semiconductor fin. An oxide layer is formed over the first semiconductor fin and the second semiconductor fin and annealed at a temperature effective to increase the germanium concentration of the second semiconductor fin. The annealing process is selective to the second semiconductor fin and does not increase the germanium concentration of the first semiconductor fin. [Selection diagram] Fig. 9