Testability of VLSI (Very Large Scale Integration) Leakage Faults in CMOS (Complementary Metal Oxide Semiconductor)

摘要

With the advent of VLSI (Very Large Scale Integration), the importance of CMOS (Complementary Metal Oxide Semiconductor) technology has increased. CMOS offers some very significant advantages over NMOS, and has emerged very competitive. Therefore, testability of CMOS devices is of considerable importance. CMOS devices exhibit some failure modes which are not adequately represented by the classical stuck-at fault model. A new fault model is introduced here to represent such faults. Leakage faults are specifically examined in this report, such faults increase the static supply current (which is ordinarily quite low) substantially. A leakage testing experiment consists of applying different vectors to the circuit, and in each case measuring the static supply current. This experimentally obtained data is then analyzed to obtain fault-related information. Leakage testing offers extra testability without any additional pins. It can detect some faults which cannot be detected by the conventional testing. Test generation for several basic CMOS structures is considered. Correspondence between leakage testing and conventional testing is studied. Two methods for analyzing experimental data are presented. Available experimental data was analyzed to obtain statistical information.