350 MHz Bipolar Monolithic PLL (Phase-Locked Loop)

摘要

A high-frequency, low-power bipolar monolithic phase-locked loop which can be used in clock recovery systems operating above 300 MHz has been designed and fabricated. Building blocks of the PLL circuit to be discussed include an analog phase detector, a temperature-compensated VCO with an on-chip varactor diode, a two-stage loop amplifier and a bandgap reference. The circuit from a 5 V supply and dissipates 270 mW. Reprints. (RH)