A 1.5-V 250-MHz to 3.0-V 622-MHz Operation CMOS Phase-Locked Loop with Precharge Type Phase-Frequency Detector

摘要

A new approach which implements a simple, high-speed phase detector with precharge logic will be presented. The minimum detectable phase difference is 40 psec, which is less than a half of conventional detectors. A current mode ring oscillator with a complementary-input bias generator has also been developed to enhance the dynamic range of the VCO under a low supply voltage. A fully CMOS PLL was designed using 0.5-μm technology. By virtue of this simple, fast detector, the wide operation range of 250 MHz at 1.5 V to 622 MHz at 3.0 V was achieved by simulation.