Mesa-Sidewall Gate Leakage in InAlAs/InGaAs Heterostructure Field-EffectTransistors

摘要

InAlAs/InGaAs HFET's fabricated by conventional mesa isolation have a potentialparasitic gate-leakage path where the gate metallization overlaps the exposed channel edge at the mesa sidewall. We have unmistakably proven the existence of this path by fabricating special heterojunction diodes with different mesa-sidewall gate-metal overlap lengths. We find that sidewall leakage is a function of the crystallographic orientation of the sidewall, and increases with channel thickness, sidewall overlap area, and InAs mole fraction in the channel. In HFET's fabricated alongside the diodes, sidewall leakage increased the subthreshold and forward gate leakage currents, and reduced the breakdown voltage.