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Investigation of a Two-Layer Gate Insulator Using Plasma-Enhanced ALD for Ultralow Temperature Poly-Si TFTs

机译:等离子体增强ALD用于超低温多晶硅TFT的两层栅极绝缘子的研究

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摘要

A two-layer oxide comprised of SiO_2 and A1_2O_3 grown at 150 deg C by atomic layer deposition (ALD) was investigated as the gate insulator for ultralow temperature poly-Si thin-film transistors (ULTPS TFTs). The two-layer gate insulator satisfied good interface quality and low leakage current at the same time. Using this material, n-channel ULTPS TFTs were fabricated on poly-Si with a threshold voltage of 2.3 V and a field-effect mobility of 104 cm~2/V s without hydrogenation.
机译:研究了通过原子层沉积(ALD)在150摄氏度下生长的由SiO_2和Al_2O_3组成的两层氧化物作为超低温多晶硅薄膜晶体管(ULTPS TFT)的栅极绝缘体。该两层栅绝缘体同时满足良好的界面质量和低漏电流。使用这种材料,在多晶硅上以2.3 V的阈值电压和104 cm〜2 / V s的场效应迁移率在没有氢化的情况下制造了n沟道ULTPS TFT。

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