Equivalence of Sequential Transition Test Generation and Constrained Combinational Stuck-at Test Generation

摘要

In this paper, a transition test generation method for acyclic sequential circuits is presented. In this method, to generate a test sequence for a transition fault in a given acyclic sequential circuit, constrained combinational stuck-at test generation is performed on its double time-expansion model, which is composed of two copies of a time-expansion model of the given circuit. This method can guarantee complete fault efficiency, i.e., it can generate test sequences for all the testable transition faults and can identify all the untestable transition faults in a given acyclic sequential circuit. Experimental results show that our method can achieve high fault efficiency with drastically short test generation time compared with that obtained by conventional methods.