首页> 外文期刊>Physica Scripta: An International Journal for Experimental and Theoretical Physics >Micro-trench free 4H-SiC etching with improved SiC/SiO2 selectivity using inductively coupled SF6/O-2/Ar plasma
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Micro-trench free 4H-SiC etching with improved SiC/SiO2 selectivity using inductively coupled SF6/O-2/Ar plasma

机译:使用电感耦合的SF6 / O-2 / AR等离子体,通过改进的SiC / SiO2选择性进行微型沟槽4H-SIC蚀刻

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摘要

SiC dry etching process for formation of a trenched-gate structure in trench metal-oxide-semiconductor field-effect-transistors employing bottom protection p-well (BPW) has been investigated. SF6/O-2/Ar based inductively-coupled-plasma reactive-ion-etching were utilized with various variations in process parameters, such as bias power, ICP power, kind of gas species, working pressure and temperature. The effects of process parameters on trench profiles were analyzed by a cross-sectional scanning electron microscope and profilometer to suppress micro trenches at a bottom corner of the trench and improve SiC/SiO2 etch selectivity. We successfully demonstrated the micro-trench free SiC trench structure with high SiC/SiO2 etch selectivity of 3.7 at bias power of 1 kW, ICP power of 4 kW, SF6/O-2/Ar flows of 6/6/8 sccm, working pressure of 15 mTorr and temperature of 20 degrees C.
机译:研究了用于在采用底部保护P阱(BPW)的沟槽金属氧化物半导体场效应晶体管中形成沟槽栅极结构的SiC干蚀刻工艺。 基于SF6 / O-2 / AR基于电感耦合等离子体反应离子蚀刻,用于工艺参数的各种变化,例如偏置功率,ICP电源,气体种类,工作压力和温度。 通过横截面扫描电子显微镜和轮廓仪分析过程参数对沟槽型材的影响,以抑制沟槽底部的微沟,并提高SiC / SiO2蚀刻选择性。 我们成功展示了带有高SiC / SiO2蚀刻选择性的微型沟槽自由SiC沟槽结构3.7,偏置功率为1 kW,ICP功率为4 kW,SF6 / O-2 / AR流量为6/6/8 SCCM,工作 15毫托的压力和20℃的温度。

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