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首页> 外文期刊>電子情報通信学会技術研究報告. シリコン材料·デバイス. Silicon Devices and Materials >Non-Destructive Inverse Modeling of Chi interconnect structure in 90nm Technology Node
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Non-Destructive Inverse Modeling of Chi interconnect structure in 90nm Technology Node

机译:90nm技术节点中Chi互连结构的无损逆建模

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摘要

Width and height of copper interconnect largely depend on the pitch of the interconnect because fluctuation due to OPC and CMP process is very sensitive to the pitch of the interconnect as well as local layout patters around the interconnect. An object of the present study is to provide a capacitance measurement circuit which decomposes total parasitic capacitance into intralayer and interlayer coupling capacitance, respectively. In addition, we demonstrate non-destructive inverse modeling of copper interconnect cross-sectional structure, which reporoduces the pitch dependence of the intralayer and interlayer coupling capacitance in 90nm technology node process. The proposed approach ensures the accuracy of LPE within about 1% error.
机译:铜互连的宽度和高度很大程度上取决于互连的间距,因为由OPC和CMP工艺引起的波动对互连的间距以及互连周围的局部布局图非常敏感。本研究的目的是提供一种电容测量电路,其将总寄生电容分别分解为层内和层间耦合电容。此外,我们展示了铜互连截面结构的无损逆模型,从而重新阐明了90nm技术节点工艺中层间和层间耦合电容的间距依赖性。提出的方法可确保LPE的精度在大约1%的误差内。

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