An Optimized Super-Junction VDMOS with Breakdown Voltage Over 600 V

摘要

Super-Junction (SJ) VDMOS has emerged and become the focus due to its on-resistance can be reduced by one-fifth under the same breakdown voltage compared with conventional VDMOS. For enhancing the property of SJ-VDMOS, in this paper, the analytical model for the relation among the key electrical parameters (breakdown voltage and on-resistance), geometrical structure and physics parameters of SJ-VDMOS can be established by device physics theories firstly. On such basis of it, an optimized of SJ-VDMOS is proposed by ISE-TCAD simulation. Meantime, we obtain its microscopic distribution (current density, electrostatic potential, electric field, space-charge region) and evaluation of electrical properties (breakdown characteristic, output characteristic). The results of simulation shows the breakdown voltage of the optimized SJ-VDMOS is closely 700 V, and the on-resistance is only 0.11375 Ω · mm~2. Our optimized results will provide important theoretical references to design and produce SJ-VDMOS.