Predictive system shutdown and other architectural techniques forenergy efficient programmable computation

摘要

With the popularity of portable devices such as personal digitalnassistants and personal communicators, as well as with increasingnawareness of the economic and environmental costs of power consumptionnby desktop computers, energy efficiency has emerged as an importantnissue in the design of electronic systems. While power efficient ASIC'snwith dedicated architectures have addressed the energy efficiency issuenfor niche applications such as DSP, much of the computation continues tonbe implemented as software running on programmable processors such asnmicroprocessors, microcontrollers, and programmable DSP's. Not only isnthis true for general purpose computation on personal computers andnworkstations, but also for portable devices, application-specificnsystems etc. In fact, firmware and embedded software executing on RISCnand DSP processor cores that are embedded in ASIC's has emerged as anleading implementation methodology for speech coding, modemnfunctionality, video compression, communication protocol processing etc.nThis paper describes architectural techniques for energy efficientnimplementation of programmable computation, particularly focussing onnthe computation needed in portable devices where event-driven userninterfaces, communication protocols, and signal processing play andominant role. Two key approaches described here are predictive systemnshutdown and extended voltage scaling. Results indicate that a largenreduction in power consumption can be achieved over current daynsolutions with little or no loss in system performance