VLSI compressor design with applications to digital neural networks

摘要

A key problem for implementing high-performance, high-capacityndigital neural networks (DNN) is to design effective VLSI compressors tonreduce the impact of carry propagation of large data matrix. In thisnpaper, such a compressor design based on complex complementarynpass-transistor logic (C2PL) is presented. Some types of 3-2ncompressors in C2PL are implemented and a number ofnexperiments are conducted to optimize their performance. Two typicalnbuilding blocks, 4-2 and 7-3 compressors, are developed and their DNNnapplications are discussed. Compared with the complementarynpass-transistor logic (CPL) and the conventional direct logic (CDL), ournsimulations show that the C2PL compressors have the bestnperformance in power, delay and number of transistors