A CORDIC processor for FFT computation and its implementation usinggallium arsenide technology

摘要

In this paper, the architecture and the implementation of ancomplex fast Fourier transform (CFFT) processor using 0.6 Μm galliumnarsenide (GaAs) technology are presented. This processor computes an1024-point FFT of 16 bit complex data in less than 8 Μs, working at anfrequency beyond 700 MHz, with a power consumption of 12.5 W. Thenarchitecture of the processor is based on the COordinate RotationnDIgital Computer (CORDIC) algorithm, which avoids the use ofnconventional multiplication-and-accumulation (MAC) units, but evaluatesnthe trigonometric functions using only add and shift operations,nImprovements to the basic CORDIC architecture are introduced in order tonreduce the area and power of the processor. This together with the usenof pipelining and carry save adders produces a very regular and fastnprocessor, The CORDIC units were fabricated and tested in order tonanticipate the final performance of the processor. This work alsondemonstrates the maturity of GaAs technology for implementingnultrahigh-performance signal processors