An efficient VLSI architecture for 2-D wavelet image coding withnovel image scan

摘要

A folded very large scale integration (VLSI) architecture isnpresented for the implementation of the two-dimensional discrete waveletntransform, without constraints on the choice of the wavelet-filter bank.nThe proposed architecture is dedicated to flexible block-oriented imagenprocessing, such as adaptive vector quantization used in wavelet imagencoding. We show that reading the image along a two-dimensional (2-D)npseudo-fractal scan creates a very modular and regular data flow and,ntherefore, considerably reduces the folding complexity and memorynrequirements for VLSI implementation. This leads to significant areansavings for on-chip storage (up to a factor of two) and reduces thenpower consumption. Furthermore, data scheduling and memory managementnremain very simple. The end result is an efficient VLSI implementationnwith a reduced area cost compared to the conventional approaches,nreading the input data line by line