Partitioning algorithm to enhance pseudoexhaustive testing ofdigital VLSI circuits

摘要

This brief introduces a partitioning algorithm, which facilitatesnpseudoexhaustive testing, to detect and locate faults in digital VLSIncircuits. The algorithm is based on an analysis of circuit's primaryninput cones and fanout (PIFAN) values. An invasive approach is employed,nwhich creates logical and physical partitions by automatically insertingnreconfigurable test cells and multiplexers. The test cells are used toncontrol and observe multiple partitioning points, while the multiplexersnexpand the controllability and observability provided by the test cells.nThe feasibility and efficiency of our algorithm are evaluated bynpartitioning numerous ISCAS 1985 and 1989 benchmark circuits containingnup to 5597 gates. Our results show that the PIFAN algorithm offersnsignificant reductions in overhead and test time when compared tonprevious partitioning algorithms