Reducing power by optimizing the necessary precision/range offloating-point arithmetic

摘要

Low-power systems often find the power cost of floating-point (FP)nhardware prohibitively expensive. This paper explores ways of reducingnFP power consumption by minimizing the bitwidth representation of FPndata. Analysis of several FP programs that manipulate low-resolutionnhuman sensory data shows that these programs suffer no loss of accuracyneven with a significant reduction in bitwidth. Most FP programs in ournbenchmark suite maintain the same output even when the mantissa bitwidthnis reduced by half. This FP bitwidth reduction can deliver a significantnpower saving through the use of a variable bitwidth FP unit. Our resultsnshow that up to 66% reduction in multiplier energy/operation can benachieved in the FP unit by this bitwidth reduction technique withoutnsacrificing any program accuracy