A Unified Detection Scheme for Crosstalk Effects in Interconnection Bus

摘要

For very deep sub-micrometer VLSI, crosstalk becomes an important issue in affecting performance and signal integrity of the circuits. Two crosstalk fault effects, namely, glitch and crosstalk-induced delay, in the system-on-chip (SOC) interconnect bus are analyzed and a unified scheme to detect them is proposed and demonstrated in this paper. The crosstalk induced delay is found to be superposition of the induced glitch and the applied signal at the victim line, and this effect is more important in affecting the circuit performance. A pulse detector with an adjustable detection threshold is proposed to detect glitches and consequently the induced delay. Several issues affecting the yield of the proposed testing scheme are discussed and Monte Carlo simulations are conducted to show the feasibility of the scheme.