...
首页> 外文期刊>Very Large Scale Integration (VLSI) Systems, IEEE Transactions on >Flip-Flop Selection for Partial Enhanced Scan to Reduce Transition Test Data Volume
【24h】

Flip-Flop Selection for Partial Enhanced Scan to Reduce Transition Test Data Volume

机译:触发器选择用于部分增强型扫描,以减少过渡测试数据量

获取原文
获取原文并翻译 | 示例
           

摘要

We propose a flip-flop selection method to reduce the overall volume of transition delay test data, by replacing a small number of selected regular scan cells with enhanced scan cells. Relative measures are presented to reflect the gains when controlling a scan cell to a certain value, and guide the scan cell selection. Experimental results on larger IWLS 2005 benchmark circuits show that, to achieve the same fault coverage of the pure launch on capture (LOC) approach, the volume of test data can be reduced to a half on average by replacing only 1% of regular scan cells to enhanced scan cells. The transition delay fault coverage can also be improved using the proposed method with equally low area overhead.
机译:我们提出了一种触发器选择方法,通过用增强型扫描单元替换少量选定的常规扫描单元来减少转换延迟测试数据的总量。提出了相对措施,以反映将扫描单元控制为特定值时的增益,并指导扫描单元的选择。在较大的IWLS 2005基准电路上的实验结果表明,要实现与纯捕获时发射(LOC)方法相同的故障覆盖率,仅替换1%的常规扫描单元,就可以将测试数据量平均减少一半。增强扫描单元。使用所提出的方法还可以以同样低的区域开销来改善过渡延迟故障覆盖率。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号