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Flexible Biometric Online Speaker-Verification System Implemented on FPGA Using Vector Floating-Point Units

机译:使用矢量浮点单元在FPGA上实现的灵活的生物识别在线说话者验证系统

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This paper presents the implementation of a speaker-verification system on field programmable gate array. The algorithm is executed by software over an embedded system that includes a MicroBlaze microprocessor connected to a vector floating-point unit (VFPU). The VFPU is designed to speed up the resolution of any vector floating-point operation involved in the verification algorithm, whereas the microprocessor manages the control of the process and executes the rest of operations. With a clock frequency of 40 MHz, the system is capable of executing the complete algorithm in real time, processing a voice frame in 9.1 ms. The same verification process was carried out for two different systems: 1) an ARM Cortex A8 microprocessor; and 2) configuring MicroBlaze with the scalar floating-point unit provided by Xilinx. The experimental results show that when comparing our proposed system against both systems, the number of clock cycles is reduced by a factor of and , respectively. The main advantage of the VFPU is its flexibility, which allows quick adaptation of the software to the potential changes produced in both the system and the user requirements. The algorithm was tested over a public database that contains the utterances of different users acquired under different environmental conditions, providing good recognition rates.
机译:本文介绍了在现场可编程门阵列上的扬声器验证系统的实现。该算法由嵌入式系统上的软件执行,该嵌入式系统包括连接到矢量浮点单元(VFPU)的MicroBlaze微处理器。 VFPU旨在提高验证算法中涉及的任何矢量浮点运算的分辨率,而微处理器则管理过程的控制并执行其余的运算。该系统具有40 MHz的时钟频率,能够实时执行完整算法,并在9.1 ms内处理语音帧。针对两个不同的系统执行了相同的验证过程:1)ARM Cortex A8微处理器; 2)使用Xilinx提供的标量浮点单元配置MicroBlaze。实验结果表明,将我们提出的系统与这两个系统进行比较时,时钟周期数分别减少了和。 VFPU的主要优点是它的灵活性,它可以使软件快速适应系统和用户需求中潜在的变化。该算法在公共数据库中进行了测试,该数据库包含在不同环境条件下获得的不同用户的话语,从而提供了良好的识别率。

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