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An All-Digital Approach to Supply Noise Cancellation in Digital Phase-Locked Loop

机译:全数字方法消除数字锁相环中的噪声

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With increased levels of integration in modern system-on-chips, the coupling of supply noise in a phase-locked loop (PLL) has become the dominant source of performance degradation in many systems. In this paper, an all-digital approach to canceling the effects of supply noise is presented. By sensing the supply noise using an analog-to-digital converter (ADC), an observer–controller loop filter jointly processes the ADC and phase detector outputs to determine the oscillator control signals that minimize the output jitter. The proposed digital PLL is shown to be significantly more robust to supply noise compared with a conventional PLL.
机译:随着现代片上系统中集成度的提高,锁相环(PLL)中电源噪声的耦合已成为许多系统性能下降的主要根源。本文提出了一种全数字方法来消除电源噪声的影响。通过使用模数转换器(ADC)感应电源噪声,观察者-控制器环路滤波器共同处理ADC和鉴相器输出,以确定可使输出抖动最小的振荡器控制信号。与传统的PLL相比,所建议的数字PLL在提供噪声方面更加强大。

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