Nonlinearity Estimation for Compensation of Phase Interpolator in Bang–Bang CDRs

摘要

This brief presents a technique for estimating the nonlinearity of phase interpolators (PIs) used in bang-bang phase detector-based clock and data recovery circuits. Using this estimation, the nonlinearity is compensated in a closed-loop manner. A Math model is proposed, which provides a theoretical basis for the nonlinearity estimation technique. The proposed technique is verified with the MATLAB model and with the Math model, which match within an LSB. The compensated nonlinearity lies within ±0.5 LSB of the PI for wide range of input conditions.